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LT3082 1 3082f typical application description 200ma single resistor low dropout linear regulator the lt ? 3082 is a 200ma low dropout linear regulator that can be paralleled to increase output current or spread heat in surface mounted boards. architected as a precision current source and voltage follower, this regulator bene? ts many applications requiring high current, adjustability to zero and no heat sink. the LT3082 withstands reverse input voltages and reverse output-to-input voltages without reverse-current ? ow. a key feature of the LT3082 is the capability to supply a wide output voltage range. a precision 0 tc 10a ref- erence current source drives a single resistor to program the output voltage to any level between zero and 38.5v. the LT3082 is stable with only 2.2f of capacitance on the output; the ic uses small ceramic capacitors that do not require additional esr as is common with other regulators. internal protection circuitry includes reverse-battery and reverse-current protection, current limiting and ther- mal limiting. the LT3082 is offered in the thermally en- hanced 8-lead tsot-23, 3-lead sot-223 and 8-lead 3mm 3mm dfn packages. variable output voltage battery powered supply features applications n outputs may be paralleled for higher output current or heat spreading n maximum output current: 200ma n wide input voltage range: 1.2v to 40v n output adjustable to 0v n stable with minimum 2.2f ceramic capacitors n single resistor sets output voltage n initial set pin current accuracy: 1% n low output noise: 33v rms (10hz to 100khz) n reverse-battery protection n reverse-current protection n <1mv load regulation typical n <0.001%/v line regulation typical n current limit and thermal shutdown protection n available in 8-lead sot-23, 3-lead sot-223 and 8-lead 3mm 3mm dfn packages n all-surface mount power supply n post regulator for switching supplies n low parts count variable voltage supply n low output voltage supply n battery powered regulator set pin current vs temperature l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. temperature (c) C50 9.900 set pin current (a) 9.950 10.000 10.050 C25 0 25 50 100 75 125 10.100 9.925 9.975 10.025 10.075 150 3082 ta01b 3082 ta01a in set out + C LT3082 v out = 10a ? r set c set 0.1f r set 500k 1f 10a 9v c out 2.2f
LT3082 2 3082f pin configuration absolute maximum ratings in pin voltage relative to set, out ........................40v set pin current (note 6) .....................................15ma set pin voltage (relative to out, note 6) ...............10v output short-circuit duration .......................... inde? nite (note 1) all voltages relative to v out top view dd package 8-lead (3mm s 3mm) plastic dfn 5 6 7 8 9 4 3 2 1 out out nc set in in nc nc t jmax = 125c, ja = 28c/w, jc = 3c/w exposed pad (pin 9) is out, must be soldered to out on the pcb; see the applications information section 3 2 1 top view tab is out in out set st package 3-lead plastic sot-223 t jmax = 125c, ja = 24c/w, jc = 15c/w tab is out, must be soldered to out on the pcb; see the applications information section nc 1 out 2 out 3 out 4 8 in 7 in 6 nc 5 set top view ts8 package 8-lead plastic tsot-23 t jmax = 125c, ja = 57c/w, jc = 15c/w order information lead free finish tape and reel part marking* package description temperature range LT3082edd#pbf LT3082edd#trpbf ldyt 8-lead (3mm 3mm) plastic dfn C40c to 125c LT3082idd#pbf LT3082idd#trpbf ldyt 8-lead (3mm 3mm) plastic dfn C40c to 125c LT3082est#pbf LT3082est#trpbf 3082 3-lead plastic sot-223 C40c to 125c LT3082ist#pbf LT3082ist#trpbf 3082 3-lead plastic sot-223 C40c to 125c LT3082mpst#pbf LT3082mpst#trpbf 3082mp 3-lead plastic sot-223 C55c to 125c LT3082ets8#pbf LT3082ets8#trpbf ltdyv 8-lead plastic sot-23 C40c to 125c LT3082its8#pbf LT3082its8#trpbf ltdyv 8-lead plastic sot-23 C40c to 125c lead based finish tape and reel part marking* package description temperature range LT3082edd LT3082edd#tr ldyt 8-lead (3mm 3mm) plastic dfn C40c to 125c LT3082idd LT3082idd#tr ldyt 8-lead (3mm 3mm) plastic dfn C40c to 125c LT3082est LT3082est#tr 3082 3-lead plastic sot-223 C40c to 125c LT3082ist LT3082ist#tr 3082 3-lead plastic sot-223 C40c to 125c LT3082mpst LT3082mpst#tr 3082mp 3-lead plastic sot-223 C55c to 125c LT3082ets8 LT3082ets8#tr ltdyv 8-lead plastic sot-23 C40c to 125c LT3082its8 LT3082its8#tr ltdyv 8-lead plastic sot-23 C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ operating junction temperature range (notes 2, 8) e, i grades ......................................... C40c to 125c mp grade ........................................... C55c to 125c storage temperature range ................... C65c to 150c lead temperature (st, ts8 packages only) soldering, 10 sec .............................................. 300c
LT3082 3 3082f electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t j = 25c. (note 2) note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: unless otherwise speci? ed, all voltages are with respect to v out . the LT3082e is tested and speci? ed under pulse load conditions such that t j ? t a . the LT3082e is 100% tested at t a = 25c. performance at C40c and 125c is assured by design, characterization, and correlation with statistical process controls. the LT3082i is guaranteed to meet all data sheet speci? cations over the full C40c to 125c operating junction temperature range. the LT3082mp is 100% tested and guaranteed over the C55c to 125c operating junction temperature range. note 3: minimum load current is equivalent to the quiescent current of the part. since all quiescent and drive current is delivered to the output of the part, the minimum load current is the minimum current required to maintain regulation. note 4: for the LT3082, dropout is speci? ed as the minimum input-to- output voltage differential required supplying a given output current. note 5: adding a small capacitor across the reference current resistor lowers output noise. adding this capacitor bypasses the resistor shot noise and reference current noise; output noise is then equal to error ampli? er noise (see the applications information section). note 6: diodes with series 1k resistors clamp the set pin to the out pin. these diodes and resistors only carry current under transient overloads. note 7: load regulation is kelvin-sensed at the package. note 8: this ic includes overtemperature protection that protects the device during momentary overload conditions. junction temperature exceeds the maximum operating junction temperature when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. parameter conditions min typ max units set pin current i set v in = 2v, i load = 1ma 2v v in 40v, 1ma i load 200ma l 9.90 9.80 10 10 10.10 10.20 a a offset voltage (v out C v set ) v os v in = 2v, i load = 1ma v in = 2v, i load = 1ma l C2 C4 2 4 mv mv load regulation (note 7) i set v os i load = 1ma to 200ma i load = 1ma to 200ma l C0.1 C0.5 C2 na mv line regulation i set v os v in = 2v to 40v, i load = 1ma v in = 2v to 40v, i load = 1ma 0.03 0.003 0.2 0.010 na/v mv/v minimum load current (note 3) 2v v in 40v l 300 500 a dropout voltage (note 4) i load = 10ma i load = 200ma l l 1.22 1.3 1.45 1.65 v v current limit v in = 5v, v set = 0v, v out = C0.1v l 200 300 ma error ampli? er rms output noise (note 5) i load = 200ma, 10hz f 100khz, c out = 10f, c set = 0.1f 33 v rms reference current rms output noise (note 5) 10hz f 100khz 0.7 na rms ripple rejection f = 120hz, v ripple = 0.5v p-p , i load = 0.1a, c out = 2.2f, c set = 0.1f f = 10khz f = 1mhz 90 75 20 db db db thermal regulation i set 10ms pulse 0.003 %/ w
LT3082 4 3082f typical performance characteristics offset voltage distribution offset voltage offset voltage load regulation minimum load current set pin current set pin current distribution offset voltage (v out C v set ) temperature (c) C50 C2.0 offset voltage (mv) C1.5 C0.5 0 0.5 2.0 1.5 0 50 75 3082 g03 C1.0 1.0 C25 25 100 125 150 temperature (c) C50 9.900 set pin current (a) 9.925 9.975 10.000 10.025 10.100 10.075 0 50 75 3082 g01 9.950 10.050 C25 25 100 125 150 input-to-output voltage (v) 0 C1.00 offset voltage (mv) C0.75 C0.25 0 0.25 1.00 0.75 10 20 25 3082 g05 C0.50 0.50 515 30 35 40 i load = 1ma temperature (c) C50 0 minimum load current (a) 200 300 400 600 0 50 75 3082 g08 100 500 C25 25 100 125 150 set pin current distribution (a) 10.20 3082 g02 9.90 10 10.10 9.80 n = 1326 v os distribution (mv) 2 3082 g04 C1 0 1 C2 n = 1326 load current (ma) 0 C400 offset voltage (v) C350 C250 C200 C150 100 C50 100 3082 g06 C300 0 50 C100 50 150 200 temperature (c) C50 change in offset voltage with load (v) change in reference current with load (na) C200 C100 150 3082 g07 C300 C400 0 50 100 C25 25 75 125 0 50 100 C250 C150 C350 C50 C20 0 C40 C80 20 C30 C10 C50 C60 C70 10 i load = 1ma to 200ma v in C v out = 3v change in reference current change in offset voltage (v out C v set )
LT3082 5 3082f temperature (c) C50 0 dropout voltage (v in C v out ) (v) 0.4 0.6 0.8 1.4 1.2 0 50 75 3082 g10 0.2 1.0 C25 25 100 125 150 i load = 100ma i load = 200ma temperature (c) C50 0 current limit (ma) 50 150 200 250 500 350 0 50 75 3082 g12 100 400 450 300 C25 25 100 125 150 v in = 7v v out = 0v load current (ma) 0 0 dropout voltage (v in C v out ) (v) 0.4 0.8 1.2 25 50 75 100 150 125 175 1.6 0.2 0.6 1.0 1.4 200 3082 g09 t j = C55c t j = 25c t j = 125c input-to-output differential voltage (v) 0 0 current limit (ma) 100 200 300 2 4 6810 400 50 150 250 350 3082 g11 t j = 25c time (s) 0 v out = 1v c in = 1f ceramic c out = 2.2f ceramic c set = 0.1f i load = 10ma to 200ma 3082 g13 0 output voltage deviation (mv) load current (ma) C50 200 100 200 300 C150 100 C100 150 250 0 50 50 150 400 500 250 350 450 time (s) C20 C40 v out = 1v c in = 1f ceramic c out = 2.2f ceramic c set = 0.1f i load = 10ma 3082 g14 0 output voltage deviation (mv) input voltage (v) 60 100 200 300 20 40 2 0 6 4 0 50 150 400 500 250 350 450 time (s) 0 c out = 2.2f ceramic r set = 100k c set = 0 r load = 5 0 output voltage (v) input voltage (v) 2.0 20 40 60 1.0 1.5 0 4 2 0.5 10 30 80 100 50 70 90 typical performance characteristics current limit line transient response load transient response dropout voltage dropout voltage current limit turn-on response
LT3082 6 3082f frequency (hz) 1 noise spectral density (nv/ hz ) reference current noise spectral density ( p a/ hz ) 10k 10k 100k 100 10 1k 3082 g19 100 10 1k 0.1 1k 10 1.0 100 typical performance characteristics ripple rejection (120hz) noise spectral density output voltage noise time 1ms/div v out 100v/div v out = 1v r set = 100k c set = 0.1f c out = 2.2f i load = 200ma 3082 g20 v bat = 3.6v i cpo = 200a c cpo = 2.2f 100 1k 10k 100k 1m 10m 10 frequency (hz) 80 ripple rejection (db) 100 60 40 20 0 120 3082 g17 v in = v out(nominal) + 3v ripple = 500mv p-p i load = 200ma c out = 2.2f c set = 0.1f c set = 0 ripple rejection temperature (c) C50 80 ripple rejection (db) 81 83 84 85 90 87 0 50 75 3082 g18 82 88 89 86 C25 25 100 125 150 v in = v out(nominal) + 2v ripple = 500mv p-p , f = 120hz i load = 0.2a c set = 0, c out = 2.2f residual output for less than minimum load current r test () 0 output voltage (mv) 800 700 600 500 400 300 200 100 0 3082 g16 2000 1000 v in = 36v v in = 5v set pin = 0v v in v out r test
LT3082 7 3082f pin functions (dd/st/ts8) block diagram in set 10a 3082 bd out C + in (pins 7, 8/pin 3/pins 7, 8): input. this pin supplies power to regulate internal circuitry and supply output load current. for the device to operate properly and regulate, the voltage on this pin must be 1.2v to 1.4v above the out pin (depending on output load currentsee the dropout voltage speci? cations in the electrical charac- teristics table). nc (pins 3, 5, 6/na/pins 1, 6): no connection. these pins have no connection to internal circuitry and may be tied to in, out, gnd or ? oated. out (pins 1, 2/pin 2/pins 2, 3, 4): output. this is the power output of the device. the LT3082 requires a 0.5ma minimum load current or the output will not regulate. set (pin 4/pin 1/pin 5): set. this pin is the error ampli- ? ers noninverting input and also sets the operating bias point of the circuit. a ? xed 10a current source ? ows out of this pin. a single external resistor programs v out . output voltage range is 0v to 38.5v. exposed pad/tab (pin 9/tab/na): output. the exposed pad of the dfn package and the tab of the sot-223 package are tied internally to out. tie them directly to out pins (pins 1, 2/pin 2) at the pcb. the amount of copper area and planes connected to the exposed pad/tab determine the effective thermal resistance of the packages (see the applications information section).
LT3082 8 3082f introduction the LT3082 regulator is easy to use and has all the pro- tection features expected in high performance regulators. included are reverse-input, reverse-output and reverse input-to-output protection for sensitive circuitry and loads. additional protection includes short-circuit protection and thermal shutdown with hysteresis. the LT3082 ? ts well in applications needing multiple rails. this new architecture adjusts down to zero with a single resistor, handling modern low voltage digital ics as well as allowing easy parallel operation and thermal manage- ment without heat sinks. adjusting to zero output allows shutting off the powered circuitry. when the input is pre- regulatedsuch as a 5v or 3.3v input supplyexternal resistors can help spread the heat. a precision 0 tc 10a reference current source connects to the noninverting input of a power operational ampli? er. the power operational ampli? er provides a low impedance buffered output to the voltage on the noninverting input. a single resistor from the noninverting input to ground sets the output voltage. if this resistor is set to 0, zero output voltage results. therefore, any output voltage be- tween zero and the maximum de? ned by the input power supply voltage is obtainable. the bene? t of using a true internal current source as the reference, as opposed to a bootstrapped reference in older regulators, is not so obvious in this architecture. a true applications information reference current source allows the regulator to have gain and frequency response independent of the impedance on the positive input. on older adjustable regulators, such as the lt1086, loop gain changes with output voltage and bandwidth changes if the adjustment pin is bypassed to ground. for the LT3082, loop gain is unchanged with output voltage changes or bypassing. output regulation is not a ? xed percentage of output voltage, but is a ? xed fraction of millivolts. use of a true current source allows all of the gain in the buffer ampli? er to provide regulation, and none of that gain is needed to amplify up the reference to a higher output voltage. programming output voltage the LT3082 generates a 10a reference current that ? ows out of the set pin. connecting a resistor from set to gnd generates a voltage that becomes the reference point for the error ampli? er (see figure 1). the reference voltage equals 10a multiplied by the value of the set pin resistor. any voltage may be generated and there is no minimum output voltage for the regulator. table 1 lists many common output voltages and the closest standard 1% resistor values used to generate that output voltage. regulation of the output voltage requires a minimum load current of 0.5ma. for a true 0v output operation, return this minimum 0.5ma load current to a negative supply voltage. figure 1. basic adjustable regulator 3082 f01 in set out + C LT3082 10a r load c set r set c in v out = 10a ? r set c out
LT3082 9 3082f applications information table 1. 1% resistors for common output voltages v out (v) r set (k) 1 100 1.2 121 1.5 150 1.8 182 2.5 249 3.3 332 5 499 with a 10a current source generating the reference voltage, leakage paths to or from the set pin can create errors in the reference and output voltages. high qual- ity insulation should be used (e.g., te? on, kel-f). the cleaning of all insulating surfaces to remove ? uxes and other residues may be required. surface coating may be necessary to provide a moisture barrier in high humidity environments. minimize board leakage by encircling the set pin and circuitry with a guard ring that is operated at a potential close to itself. tie the guard ring to the out pin. guarding both sides of the circuit board is required. bulk leakage reduction depends on the guard ring width. 10na of leak- age into or out of the set pin and its associated circuitry creates a 0.1% reference voltage error. leakages of this magnitude, coupled with other sources of leakage, can cause signi? cant offset voltage and reference drift, es- pecially over the possible operating temperature range. figure 2 depicts an example guard ring layout. if guard ring techniques are used, this bootstraps any stray capacitance at the set pin. since the set pin is a high impedance node, unwanted signals may couple into the set pin and cause erratic behavior. this will be most noticeable when operating with minimum output capacitors at full load current. the easiest way to remedy this is to bypass the set pin with a small amount of capacitance from set to ground; 10pf to 20pf is suf? cient. stability and output capacitance the LT3082 requires an output capacitor for stability. it is designed to be stable with most low esr capacitors (typically ceramic, tantalum or low esr electrolytic). a minimum output capacitor of 2.2f with an esr of 0.5 or less is recommended to prevent oscillations. larger values of output capacitance decrease peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the LT3082, increase the effective output capacitor value. for improvement in transient response performance, place a capacitor across the voltage setting resistor. capacitors up to 1f can be used. this bypass capacitor reduces system noise as well, but start-up time is proportional to the time constant of the voltage setting resistor (r set in figure 1) and set pin bypass capacitor. give extra consideration to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of di- figure 2. example guard ring layout for dfn package 3082 f02 out gnd set
LT3082 10 3082f applications information electrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are speci? ed with eia temperature characteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coef? cients, as shown in figures 3 and 4. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied and over the operating temperature range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is available in higher values. care still must be exercised when using x5r and x7r capacitors. the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than with y5v and z5u capacitors, but can still be signi? cant enough to drop capacitor values below appropriate levels. capacitor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be veri? ed. voltage and temperature coef? cients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress. in a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. stability and input capacitance low esr, ceramic input bypass capacitors are acceptable for applications without long input leads. however, applica- tions connecting a power supply to an LT3082 circuits in and gnd pins with long input wires combined with a low esr, ceramic input capacitors are prone to voltage spikes, reliability concerns and application-speci? c board oscil- lations. the input wire inductance found in many battery powered applications, combined with the low esr ceramic input capacitor, forms a high-q lc resonant tank circuit. in some instances this resonant frequency beats against the output current dependent ldo bandwidth and interferes with proper operation. simple circuit modi? cations/solu- tions are then required. this behavior is not indicative of LT3082 instability, but is a common ceramic input bypass capacitor application issue. the self-inductance, or isolated inductance, of a wire is directly proportional to its length. wire diameter is not a major factor on its self-inductance. for example, the self- inductance of a 2-awg isolated wire (diameter = 0.26") is about half the self-inductance of a 30-awg wire (diameter = 0.01"). one foot of 30-awg wire has about 465nh of self-inductance. one of two ways reduces a wires self-inductance. one method divides the current ? owing towards the LT3082 between two parallel conductors. in this case, the farther apart the wires are from each other, the more the self-in- ductance is reduced; up to a 50% reduction when placed a few inches apart. splitting the wires basically connects dc bias voltage (v) change in value (%) 3082 f03 20 0 C20 C40 C60 C80 C100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10f figure 3. ceramic capacitor dc bias characteristics temperature (c) C50 40 20 0 C20 C40 C60 C80 C100 25 75 3082 f04 C25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10f figure 4. ceramic capacitor temperature characteristics
LT3082 11 3082f applications information two equal inductors in parallel, but placing them in close proximity gives the wires mutual inductance adding to the self-inductance. the second and most effective way to reduce overall inductance is to place both forward and return current conductors (the input and gnd wires) in very close proximity. two 30-awg wires separated by only 0.02", used as forward- and return-current conduc- tors, reduce the overall self-inductance to approximately one-? fth that of a single isolated wire. if wiring modi? cations are not permissible for the applica- tions, including series resistance between the power supply and the input of the LT3082 also stabilizes the application. as little as 0.1 to 0.5, often less, is effective in damping the lc resonance. if the added impedance between the power supply and the input is unacceptable, adding esr to the input capacitor also provides the necessary damping of the lc resonance. however, the required esr is generally higher than the series impedance required. paralleling devices higher output current is obtained by paralleling multiple LT3082s together. tie the individual set pins together and tie the individual in pins together. connect the outputs in common using small pieces of pc trace as ballast resistors to promote equal current sharing. pc trace resistance in m/inch is shown in table 2. ballasting requires only a tiny area on the pcb. table 2. pc board trace resistance weight (oz) 10mil width 20mil width 1 54.3 27.1 2 27.1 13.6 trace resistance is measured in m/in the worst-case room temperature offset, only 2mv between the set pin and the out pin, allows the use of very small ballast resistors. as shown in figure 5, each LT3082 has a small 50m ballast resistor, which at full output current gives better than 80% equalized sharing of the current. the external resistance of 50m (25m for the two devices in paral- lel) adds only about 10mv of output regulation drop at an output of 0.4a. even with an output voltage as low as 1v, this adds only 1% to the regulation. of course, paralleling more than two LT3082s yields even higher output current. spreading the devices on the pc board also spreads the heat. series input resistors can further spread the heat if the input-to-output difference is high. figure 5. parallel devices set + C LT3082 10a 50m 50m in v in 4.8v to 40v v out , 3.3v 0.4a out 10f 1f 165k 3082 f05 set + C LT3082 10a in out quieting the noise the LT3082 offers numerous noise performance advan- tages. every linear regulator has its sources of noise. in general, a linear regulators critical noise source is the reference. in addition, consider the error ampli? ers noise contribution along with the resistor dividers noise gain. many traditional low noise regulators bond out the voltage reference to an external pin (usually through a large value resistor) to allow for bypassing and noise reduction. the LT3082 does not use a traditional voltage reference like other linear regulators. instead, it uses a 10a reference current. the 10a current source generates noise current levels of 2.7pa/ hz (0.7na rms over the 10hz to 100khz bandwidth). the equivalent voltage noise equals the rms noise current multiplied by the resistor value. the set pin resistor generates spot noise equal to 4ktr (k = boltzmanns constant, 1.38 ? 10 C23 j/k, and t is abso- lute temperature) which is rms summed with the voltage noise if the application requires lower noise performance, bypass the voltage/current setting resistor with a capacitor to gnd. note that this noise-reduction capacitor increases start-up time as a factor of the rc time constant.
LT3082 12 3082f applications information the LT3082 uses a unity-gain follower from the set pin to the out pin. therefore, multiple possibilities exist (besides a set pin resistor) to set output voltage. for example, using a high accuracy voltage reference from set to gnd removes the errors in output voltage due to reference current tolerance and resistor tolerance. active driving of the set pin is acceptable. the typical noise scenario for a linear regulator is that the output voltage setting resistor divider gains up the noise reference, especially if v out is much greater than v ref . the LT3082s noise advantage is that the unity-gain follower presents no noise gain whatsoever from the set pin to the output. thus, noise ? gures do not increase accordingly. error ampli? er noise is typical 100nv/ hz (33v rms over the 10hz to 100khz bandwidth). the error ampli? ers noise is rms summed with the other noise terms to give a ? nal noise ? gure for the regulator. curves in the typical performance characteristics sec- tion show noise spectral density and peak-to-peak noise characteristics for both the reference current and error ampli? er over the 10hz to 100khz bandwidth. load regulation the LT3082 is a ? oating device. no ground pin exists on the packages. thus, the ic delivers all quiescent current and drive current to the load. therefore, it is not possible to provide true remote load sensing. the connection resis- tance between the regulator and the load determines load regulation performance. the data sheets load regulation speci? cation is kelvin sensed at the packages pins. nega- tive-side sensing is a true kelvin connection by returning the bottom of the voltage setting resistor to the negative side of the load (see figure 6). connected as shown, system load regulation is the sum of the LT3082s load regulation and the parasitic line resistance multiplied by the output current. to minimize load regulation, keep the positive connection between the regulator and load as short as possible. if possible, use large diameter wire or wide pc board traces. figure 6. connections for best load regulation in set + C LT3082 10a 3082 f06 out r set r p parasitic resistance r p r p load thermal considerations the LT3082s internal power and thermal limiting circuitry protects itself under overload conditions. for continuous normal load conditions, do not exceed the 125c maximum junction temperature. carefully consider all sources of thermal resistance from junction-to-ambient. this includes (but is not limited to) junction-to-case, case-to-heat sink interface, heat sink resistance or circuit board-to-ambient as the application dictates. consider all additional, adjacent heat generating sources in proximity on the pcb. surface mount packages provide the necessary heatsinking by using the heat spreading capabilities of the pc board, copper traces and planes. surface mount heat sinks, plated through-holes and solder-? lled vias can also spread the heat generated by power devices. junction-to-case thermal resistance is speci? ed from the ic junction to the bottom of the case directly, or the bottom of the pin most directly, in the heat path. this is the lowest thermal resistance path for heat ? ow. only proper device mounting ensures the best possible thermal ? ow from this area of the package to the heat sinking material. note that the exposed pad of the dfn package and the tab of the sot-223 package is electrically connected to the output (v out ).
LT3082 13 3082f applications information tables 3 through 5 list thermal resistance as a function of copper areas in a ? xed board size. all measurements were taken in still air on a 4-layer fr-4 board with 1oz solid internal planes and 2oz external trace planes with a total ? nished board thickness of 1.6mm. table 3. dd package, 8-lead dfn copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 25c/w 1000mm 2 2500mm 2 2500mm 2 25c/w 225mm 2 2500mm 2 2500mm 2 28c/w 100mm 2 2500mm 2 2500mm 2 32c/w *device is mounted on topside table 4. ts8 package, 8-lead sot-23 copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 54c/w 1000mm 2 2500mm 2 2500mm 2 54c/w 225mm 2 2500mm 2 2500mm 2 57c/w 100mm 2 2500mm 2 2500mm 2 63c/w *device is mounted on topside table 5. st package, 3-lead sot-223 copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 20c/w 1000mm 2 2500mm 2 2500mm 2 20c/w 225mm 2 2500mm 2 2500mm 2 24c/w 100mm 2 2500mm 2 2500mm 2 29c/w *device is mounted on topside for further information on thermal resistance and using thermal information, refer to jedec standard jesd51, notably jesd51-12. pcb layers, copper weight, board layout and thermal vias affect the resultant thermal resistance. please reference jedec standard jesd51-7 for further information on high thermal conductivity test boards. achieving low thermal resistance necessitates attention to detail and careful layout. demo circuit 1447as board layout using multiple inner v out planes and multiple thermal vias achieves 28c/w performance for the dfn package. calculating junction temperature example: given an industrial factory application with an input voltage of 15v 10%, an output voltage of 12v 5%, an output current of 200ma and a maximum ambient temperature of 50c, what would be the maximum junc- tion temperature for a dfn package? the total circuit power equals: p total = (v in C v out )(i out ) the set pin current is negligible and can be ignored. v in(max continuous) = 16.5 (15v + 10%) v out(min continuous) = 11.4v (12v C 5%) i out = 200ma power dissipation under these conditions equals: p total = (16.5 C 11.4v)(200ma) = 1.02w junction temperature equals: t j = t a + p total ? ja t j = 50c + (1.02w ? 30c/w) = 80.6c in this example, junction temperature is below the maxi- mum rating, ensuring reliable operation.
LT3082 14 3082f typical applications dac-controlled regulator two-level regulator protection features the LT3082 incorporates several protection features ideal for battery-powered circuits, among other applications. in addition to normal monolithic regulator protection features such as current limiting and thermal limiting, the LT3082 protects itself against reverse-input voltages, reverse- output voltages, and reverse out-to-set pin voltages. current limit protection and thermal overload protection protect the ic against output current overload conditions. for normal operation, do not exceed a junction temperature of 125c. the thermal shutdown circuits temperature threshold is typically 165c and incorporates about 5c of hysteresis. the LT3082s in pin withstands 40v voltages with respect to the out and set pins. reverse current ? ow, if out is greater than in, is less than 1ma (typically under 100a), protecting the LT3082 and sensitive loads. clamping diodes and 1k limiting resistors protect the LT3082s set pin relative to the out pin voltage. these protection components typically only carry current under transient overload conditions. these devices are sized to handle 10v differential voltages and 15ma crosspin current ? ow without concern. relative to these application concerns, note the following two scenarios. the ? rst sce- nario employs a noise-reducing set pin bypass capacitor while out is instantaneously shorted to gnd. the second scenario follows improper shutdown techniques in which the set pin is reset to gnd quickly while out is held up by a large output capacitance with light load. the typical applications section shows simple, robust techniques for shutting down set and out together. applications information + C set + C LT3082 10a in out v in v out 3082 ta02 gain = 4 lt1991 4.7f 150k 150k 450k ltc2641 spi set + C LT3082 10a in out v in v out 3082 ta03 r1 r2 vn2222ll 2.2f
LT3082 15 3082f typical applications using a lower value set resistor adding soft-start coincident tracking set + C LT3082 10a in out 1ma v in 12v c out 4.7f v out 0.5v to 10v 3082 ta04 r1 49.9k 1% r set 10k r2 499 1% c1 1f v out = 0.5v + 1ma ? r set set + C LT3082 10a in out v in 4.8v to 40v v out 3.3v 0.2a c out 4.7f 3082 ta05 r1 332k c2 0.01f c1 1f d1 1n4148 + C LT3082 10a set + C LT3082 10a in out set + C LT3082 10a in out v out3 5v 0.2a c3 4.7f v out2 3.3v 0.2a 3082 ta06 r2 80.6k c2 4.7f c1 1.5f v in 7v to 40v r1 249k v out1 2.5v 0.2a set in out r3 169k c4 4.7f
LT3082 16 3082f typical applications reference buffer set + C LT3082 10a 3082 ta08 in out c1 1f * minimum load 0.5ma v out * v in output gnd input c2 4.7f lt1019 high voltage regulator ramp generator adding shutdown set + C LT3082 10a in out v in v out 3082 ta07 r1 on off shutdown q1 vn2222ll q2* vn2222ll q2 insures zero output in the absence of any output load. * set + C LT3082 10a in out 6.1v 1n4148 v in 50v v out 0.2a v out = 20v v out = 10a ? r set 3082 ta09 r set 2meg 4.7f 15f 10f buz11 10k + + set + C LT3082 10a in out v in 5v v out 3082 ta10 vn2222ll vn2222ll 4.7f 1f 1nf
LT3082 17 3082f package description 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.38 0.10 bottom view?xposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ?0.05 (dd) dfn 1203 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698)
LT3082 18 3082f package description .114 ?.124 (2.90 ?3.15) .248 ?.264 (6.30 ?6.71) .130 ?.146 (3.30 ?3.71) .264 ?.287 (6.70 ?7.30) .0905 (2.30) bsc .033 ?.041 (0.84 ?1.04) .181 (4.60) bsc .024 ?.033 (0.60 ?0.84) .071 (1.80) max 10 max .012 (0.31) min .0008 ?.0040 (0.0203 ?0.1016) 10 ?16 .010 ?.014 (0.25 ?0.36) 10 ?16 recommended solder pad layout st3 (sot-233) 0502 .129 max .059 max .059 max .181 max .039 max .248 bsc .090 bsc st package 3-lead plastic sot-223 (reference ltc dwg # 05-08-1630)
LT3082 19 3082f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description 1.50 ?1.75 (note 4) 2.80 bsc 0.22 ?0.36 8 plcs (note 3) datum ? 0.09 ?0.20 (note 3) ts8 tsot-23 0802 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.52 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637)
LT3082 20 3082f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0709 ? printed in usa typical applications related parts part number description comments lt1761 100ma, low noise ldo 300mv dropout voltage, low noise = 20v rms , v in : 1.8v to 20v, thinsot ? package lt1762 150ma, low noise ldo 300mv dropout voltage, low noise = 20v rms , v in : 1.8v to 20v, ms-8 package lt1763 500ma, low noise ldo 300mv dropout voltage, low noise = 20v rms , v in : 1.8v to 20v, so-8 package lt1962 300ma, low noise ldo 270mv dropout voltage, low noise = 20v rms , v in : 1.8v to 20v, ms-8 package lt1964 200ma, low noise, negative ldo 340mv dropout voltage, low noise = 30v rms , v in : C1.8v to C20v, thinsot package lt3008 20ma, 45v, 3a i q micropower ldo 280mv dropout voltage, low i q = 3a, v in : 2v to 45v, v out : 0.6v to 39.5v; thinsot and 2mm 2mm dfn-6 packages lt3009 20ma, 3a i q micropower ldo 280mv dropout voltage, low i q = 3a, v in : 1.6v to 20v, v out : 0.6v to 19.5v; thinsot and sc-70 packages lt3010 50ma, high voltage, micropower ldo v in : 3v to 80v, v out : 1.275v to 60v, v do = 0.3v, i q = 30a, i sd <1a, low noise <100v rms , stable with 1f output capacitor, exposed ms8 package lt3011 50ma, high voltage, micropower ldo with power good v in : 3v to 80v, v out : 1.275v to 60v, v do = 0.3v, i q = 46a, i sd <1a, low noise <100v rms , power good, stable with 1f output capacitor, 3mm 3mm dfn-10 and exposed ms-12e packages lt3012 250ma, 4v to 80v, low dropout micropower linear regulator v in : 4v to 80v, v out : 1.24v to 60v, v do = 0.4v, i q = 40a, i sd <1a, tssop-16e and 4mm 3mm dfn-12 packages lt3013 250ma, 4v to 80v, low dropout micro-power linear regulator with pwrgd v in : 4v to 80v, v out : 1.24v to 60v, v do = 0.4v, i q = 65a, i sd <1a, power good; tssop-16e and 4mm 3mm dfn-12 packages lt3014/lt3014hv 20ma, 3v to 80v, low dropout micropower linear regulator v in : 3v to 80v (100v for 2ms, hv version), v out : 1.22v to 60v, v do = 0.35v, i q = 7a, i sd <1a, thinsot and 3mm 3mm dfn-8 packages lt3020 100ma, low voltage vldo linear regulator v in : 0.9v to 10v, v out : 0.2v to 5v (min), v do = 0.15v, i q = 120a, noise <250v rms , stable with 2.2f ceramic capacitors, dfn-8 and ms-8 packages lt3021 500ma, low voltage, very low dropout vldo linear regulator v in : 0.9v to 10v, dropout voltage = 160mv (typical), adjustable output (v ref = v out(min) = 200mv), fixed output voltages: 1.2v, 1.5v, 1.8v, stable with low esr, ceramic output capacitors 16-pin 5mm 5mm dfn and 8-lead so packages lt3080/lt3080-1 1.1a, parallelable, low noise, low dropout linear regulator 300mv dropout voltage (2-supply operation), low noise = 40v rms , v in : 1.2v to 36v, v out : 0v to 35.7v, current-based reference with 1-resistor v out set; directly parallelable (no op amp required), stable with ceramic capacitors; to-220, sot-223, msop-8 and 3mm 3mm dfn-8 packages; lt3080-1 version has integrated internal ballast resistor lt3085 500ma, parallelable, low noise, low dropout linear regulator 275mv dropout voltage (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, v out : 0v to 35.7v, current-based reference with 1-resistor v out set; directly parallelable (no op amp required), stable with ceramic capacitors; msop-8 and 2mm 3mm dfn-6 packages thinsot is a trademark of linear technology corporation. set + C LT3082 10a 3082 ta11 in out r2 100k v out 0.5v to 3v v in r1, 100k v1 0v to 5v 2.2f active-driven regulator v r rr varr out = + ? ? ? ? ? ? + 2 12 110 1 2 (||)

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